High-speed serial communication circuits, such as for example an input side of a 40 gigabits/second (“Gbits/s”) or faster serializer-deserializer (“SerDes”), conventionally use signal processing circuitry to achieve at least a target bit error rate. Along those lines, high-speed communication links or channels may have different signal loss levels. Accordingly, it would be useful to have a channel adaptive analog-to-digital converter-based (“ADC-based”) receiver, such as a channel-adaptive, ADC-based SerDes receiver for example, to accommodate dynamically changing signal channel transmission conditions to achieve at least a target error rate.